MS/ArduinoCore-mbed
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
Files
main
ArduinoCore-mbed/patches/0014-Add-support-for-Arduino-Edge-Control.patch
Martino Facchin b20c4e0bcf Update patchset
2023-03-01 09:19:18 +01:00

298 lines
7.2 KiB
Diff
Raw Permalink Blame History

From fe02240e6f395771a11e37705386e3d6dd82cd58 Mon Sep 17 00:00:00 2001
From: Giampaolo Mancini <giampaolo@trampolineup.com>
Date: Wed, 8 Jan 2020 16:42:46 +0100
Subject: [PATCH 014/204] Add support for Arduino Edge Control
---
.../TARGET_EDGE_CONTROL/PinNames.h | 207 ++++++++++++++++++
.../TARGET_EDGE_CONTROL/device.h | 38 ++++
targets/targets.json | 13 ++
3 files changed, 258 insertions(+)
create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_EDGE_CONTROL/PinNames.h
create mode 100644 targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_EDGE_CONTROL/device.h
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_EDGE_CONTROL/PinNames.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_EDGE_CONTROL/PinNames.h
new file mode 100644
index 0000000000..afce410894
--- /dev/null
+++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_EDGE_CONTROL/PinNames.h
@@ -0,0 +1,207 @@
+/*
+ * Copyright (c) 2019 Arduino SA
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+#include "nrf_gpio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+ PIN_INPUT,
+ PIN_OUTPUT
+} PinDirection;
+
+///> define macro producing for example Px_y = NRF_GPIO_PIN_MAP(x, y)
+#define PinDef(port_num, pin_num) P##port_num##_##pin_num = NRF_GPIO_PIN_MAP(port_num, pin_num)
+
+
+typedef enum {
+ PinDef(0 , 0), // P0_0 = 0...
+ PinDef(0 , 1),
+ PinDef(0 , 2),
+ PinDef(0 , 3),
+ PinDef(0 , 4),
+ PinDef(0 , 5),
+ PinDef(0 , 6),
+ PinDef(0 , 7),
+ PinDef(0 , 8),
+ PinDef(0 , 9),
+ PinDef(0 , 10),
+ PinDef(0 , 11),
+ PinDef(0 , 12),
+ PinDef(0 , 13),
+ PinDef(0 , 14),
+ PinDef(0 , 15),
+ PinDef(0 , 16),
+ PinDef(0 , 17),
+ PinDef(0 , 18),
+ PinDef(0 , 19),
+ PinDef(0 , 20),
+ PinDef(0 , 21),
+ PinDef(0 , 22),
+ PinDef(0 , 23),
+ PinDef(0 , 24),
+ PinDef(0 , 25),
+ PinDef(0 , 26),
+ PinDef(0 , 27),
+ PinDef(0 , 28),
+ PinDef(0 , 29),
+ PinDef(0 , 30),
+ PinDef(0 , 31),
+
+ PinDef(1 , 0), //P1_1 = 32...
+ PinDef(1 , 1),
+ PinDef(1 , 2),
+ PinDef(1 , 3),
+ PinDef(1 , 4),
+ PinDef(1 , 5),
+ PinDef(1 , 6),
+ PinDef(1 , 7),
+ PinDef(1 , 8),
+ PinDef(1 , 9),
+ PinDef(1 , 10),
+ PinDef(1 , 11),
+ PinDef(1 , 12),
+ PinDef(1 , 13),
+ PinDef(1 , 14),
+ PinDef(1 , 15),
+
+ // Port0
+ p0 = P0_0,
+ p1 = P0_1,
+ p2 = P0_2,
+ p3 = P0_3,
+ p4 = P0_4,
+ p5 = P0_5,
+ p6 = P0_6,
+ p7 = P0_7,
+ p8 = P0_8,
+ p9 = P0_9,
+ p10 = P0_10,
+ p11 = P0_11,
+ p12 = P0_12,
+ p13 = P0_13,
+ p14 = P0_14,
+ p15 = P0_15,
+ p16 = P0_16,
+ p17 = P0_17,
+ p18 = P0_18,
+ p19 = P0_19,
+ p20 = P0_20,
+ p21 = P0_21,
+ p22 = P0_22,
+ p23 = P0_23,
+ p24 = P0_24,
+ p25 = P0_25,
+ p26 = P0_26,
+ p27 = P0_27,
+ p28 = P0_28,
+ p29 = P0_29,
+ p30 = P0_30,
+ p31 = P0_31,
+
+ // Port1
+ p32 = P1_0,
+ p33 = P1_1,
+ p34 = P1_2,
+ p35 = P1_3,
+ p36 = P1_4,
+ p37 = P1_5,
+ p38 = P1_6,
+ p39 = P1_7,
+ p40 = P1_8,
+ p41 = P1_9,
+ p42 = P1_10,
+ p43 = P1_11,
+ p44 = P1_12,
+ p45 = P1_13,
+ p46 = P1_14,
+ p47 = P1_15,
+
+ TX_PIN_NUMBER = P1_11,
+ RX_PIN_NUMBER = P1_10,
+
+
+ // mBed interface Pins
+ CONSOLE_TX = TX_PIN_NUMBER,
+ CONSOLE_RX = RX_PIN_NUMBER,
+ STDIO_UART_TX = TX_PIN_NUMBER,
+ STDIO_UART_RX = RX_PIN_NUMBER,
+
+ SPI_PSELMOSI0 = P0_20,
+ SPI_PSELMISO0 = P0_21,
+ SPI_PSELSCK0 = P0_19,
+ SPI_PSELSS0 = P1_12,
+
+ SPIS_PSELMOSI = P0_20,
+ SPIS_PSELMISO = P0_21,
+ SPIS_PSELSCK = P0_19,
+ SPIS_PSELSS = P1_12,
+
+ I2C_SDA0 = P1_9,
+ I2C_SCL0 = P0_11,
+ I2C_SDA1 = P0_31,
+ I2C_SCL1 = P0_2,
+
+ /**** QSPI pins ****/
+ QSPI1_IO0 = P0_20,
+ QSPI1_IO1 = P0_21,
+ QSPI1_IO2 = P0_22,
+ QSPI1_IO3 = P0_23,
+ QSPI1_SCK = P0_19,
+ QSPI1_CSN = P0_17,
+
+ /**** QSPI FLASH pins ****/
+ QSPI_FLASH1_IO0 = QSPI1_IO0,
+ QSPI_FLASH1_IO1 = QSPI1_IO1,
+ QSPI_FLASH1_IO2 = QSPI1_IO2,
+ QSPI_FLASH1_IO3 = QSPI1_IO3,
+ QSPI_FLASH1_SCK = QSPI1_SCK,
+ QSPI_FLASH1_CSN = QSPI1_CSN,
+
+ // Not connected
+ NC = (int)0xFFFFFFFF,
+
+ STDIO_UART_RTS = NC,
+ STDIO_UART_CTS = NC,
+
+ LED1 = NC,
+ LED2 = NC,
+ LED3 = NC,
+ LED4 = NC,
+ BUTTON1 = NC,
+ BUTTON2 = NC,
+ BUTTON3 = NC,
+ BUTTON4 = NC,
+} PinName;
+
+typedef enum {
+ PullNone = 0,
+ PullDown = 1,
+ PullUp = 3,
+ PullDefault = PullUp
+} PinMode;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_EDGE_CONTROL/device.h b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_EDGE_CONTROL/device.h
new file mode 100644
index 0000000000..2427e752ea
--- /dev/null
+++ b/targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/TARGET_EDGE_CONTROL/device.h
@@ -0,0 +1,38 @@
+// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
+// Check the 'features' section of the target description in 'targets.json' for more details.
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_DEVICE_H
+#define MBED_DEVICE_H
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+#include "objects.h"
+
+#endif
diff --git a/targets/targets.json b/targets/targets.json
index 8d418bd6b9..c035a6ed52 100644
--- a/targets/targets.json
+++ b/targets/targets.json
@@ -7067,6 +7067,19 @@
"CONFIG_GPIO_AS_PINRESET"
]
},
+ "EDGE_CONTROL": {
+ "inherits": ["MCU_NRF52840"],
+ "features_add": ["STORAGE"],
+ "device_has_remove": ["ITM"],
+ "device_has_add": ["WATCHDOG"],
+ "components_add": [
+ "SD",
+ "SPIF"
+ ],
+ "macros_add": [
+ "CONFIG_GPIO_AS_PINRESET"
+ ]
+ },
"NUMAKER_PFM_NUC472": {
"core": "Cortex-M4F",
"components_add": [
--
2.39.1
Reference in New Issue View Git Blame Copy Permalink