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ArduinoCore-mbed/patches/0016-RP2040-add-NANO_RP2040_CONNECT-target.patch
Martino Facchin b20c4e0bcf Update patchset
2023-03-01 09:19:18 +01:00

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From d513993457a61cf37cf53aaf02a53c769f132484 Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Mon, 3 May 2021 10:56:43 +0200
Subject: [PATCH 016/204] RP2040: add NANO_RP2040_CONNECT target
---
targets/CMakeLists.txt | 1 +
targets/TARGET_RASPBERRYPI/CMakeLists.txt | 11 +
.../TARGET_RP2040/.mbedignore | 20 ++
.../TARGET_RP2040/CMakeLists.txt | 12 +
.../TARGET_RP2040/PeripheralNames.h | 102 +++++++
.../TARGET_RP2040/PortNames.h | 31 +++
.../TARGET_NANO_RP2040_CONNECT/PinNames.h | 64 +++++
.../TARGET_NANO_RP2040_CONNECT/board.c | 3 +
.../bs2_default_padded_checksummed.S | 23 ++
.../TOOLCHAIN_GCC_ARM/memmap_default.ld | 252 ++++++++++++++++++
.../TARGET_RASPBERRYPI/TARGET_RP2040/cmsis.h | 60 +++++
.../TARGET_RP2040/cmsis_nvic.h | 36 +++
.../TARGET_RASPBERRYPI/TARGET_RP2040/device.h | 37 +++
.../TARGET_RP2040/gpio_api.c | 37 +++
.../TARGET_RP2040/mbed_overrides.c | 11 +
.../TARGET_RP2040/objects.h | 111 ++++++++
targets/TARGET_RASPBERRYPI/mbed_rtx.h | 27 ++
targets/targets.json | 29 ++
18 files changed, 867 insertions(+)
create mode 100644 targets/TARGET_RASPBERRYPI/CMakeLists.txt
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/.mbedignore
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/CMakeLists.txt
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/PeripheralNames.h
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/PortNames.h
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/PinNames.h
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/board.c
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/bs2_default_padded_checksummed.S
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/TOOLCHAIN_GCC_ARM/memmap_default.ld
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/cmsis.h
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/cmsis_nvic.h
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/device.h
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/gpio_api.c
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/mbed_overrides.c
create mode 100644 targets/TARGET_RASPBERRYPI/TARGET_RP2040/objects.h
create mode 100644 targets/TARGET_RASPBERRYPI/mbed_rtx.h
diff --git a/targets/CMakeLists.txt b/targets/CMakeLists.txt
index 36c9454e67..a54c44804b 100644
--- a/targets/CMakeLists.txt
+++ b/targets/CMakeLists.txt
@@ -15,6 +15,7 @@ if(${CMAKE_CROSSCOMPILING})
add_subdirectory(TARGET_NORDIC EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_NUVOTON EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_NXP EXCLUDE_FROM_ALL)
+ add_subdirectory(TARGET_RASPBERRYPI EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_RENESAS EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_Samsung EXCLUDE_FROM_ALL)
add_subdirectory(TARGET_Silicon_Labs EXCLUDE_FROM_ALL)
diff --git a/targets/TARGET_RASPBERRYPI/CMakeLists.txt b/targets/TARGET_RASPBERRYPI/CMakeLists.txt
new file mode 100644
index 0000000000..3ba15e7d89
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/CMakeLists.txt
@@ -0,0 +1,11 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+if("RPI2010" IN_LIST MBED_TARGET_LABELS)
+ add_subdirectory(TARGET_RPI2040)
+endif()
+
+target_include_directories(mbed-core
+ INTERFACE
+ .
+)
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/.mbedignore b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/.mbedignore
new file mode 100644
index 0000000000..2b44582cfc
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/.mbedignore
@@ -0,0 +1,20 @@
+pico-sdk/common/pico_stdlib/include/pico/*
+pico-sdk/common/pico_time/include/pico/*
+pico-sdk/rp2_common/pico_stdio*
+pico-sdk/rp2_common/pico_printf*
+pico-sdk/boards/include/boards/*
+pico-sdk/common/pico_base/include/pico/*
+pico-sdk/rp2_common/boot_stage2/*
+pico-sdk/rp2_common/pico_multicore/*
+pico-sdk/rp2_common/pico_malloc/*
+pico-sdk/rp2_common/pico_stdlib/
+pico-sdk/rp2_common/pico_mem_ops/*
+pico-sdk/rp2_common/pico_double/double_aeabi.S
+pico-sdk/rp2_common/pico_double/double_none.S
+pico-sdk/rp2_common/pico_float/float_aeabi.S
+pico-sdk/rp2_common/pico_float/float_none.S
+pico-sdk/rp2_common/pico_standard_link/new_delete.cpp
+pico-sdk/rp2_common/pico_standard_link/*.ld
+pico-sdk/rp2_common/pico_unique_id/*
+pico-sdk/rp2_common/hardware_divider/*
+pico-sdk/host/*
\ No newline at end of file
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/CMakeLists.txt b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/CMakeLists.txt
new file mode 100644
index 0000000000..9dc9297048
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/CMakeLists.txt
@@ -0,0 +1,12 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+if("NANO_RP2040_CONNECT" IN_LIST MBED_TARGET_LABELS)
+ target_include_directories(mbed-core
+ INTERFACE
+ TARGET_NANO_RP2040_CONNECT
+ )
+endif()
+
+add_subdirectory(rp2_common)
+add_subdirectory(rp2040)
\ No newline at end of file
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/PeripheralNames.h b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/PeripheralNames.h
new file mode 100644
index 0000000000..220d4a831e
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/PeripheralNames.h
@@ -0,0 +1,102 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+#include "PinNames.h"
+
+typedef enum {
+ UART_0 = 0,
+ UART_1,
+} UARTName;
+
+typedef enum {
+ ADC0_0 = 26,
+ ADC0_1,
+ ADC0_2,
+ ADC0_3
+} ADCName;
+
+typedef enum {
+ SPI_0 = 0,
+ SPI_1
+} SPIName;
+
+typedef enum {
+ I2C_0 = 0,
+ I2C_1
+} I2CName;
+
+typedef enum {
+ PWM_1 = 0,
+ PWM_2,
+ PWM_3,
+ PWM_4,
+ PWM_5,
+ PWM_6
+} PWMName;
+
+/* Defines to be used by application */
+typedef enum {
+ PIN_INPUT = 0,
+ PIN_OUTPUT
+} PinDirection;
+
+typedef enum {
+ PullNone = 0,
+ PullUp = 1,
+ PullDown = 2,
+ OpenDrainPullUp = 3,
+ OpenDrainNoPull = 4,
+ OpenDrainPullDown = 5,
+ PushPullNoPull = PullNone,
+ PushPullPullUp = PullUp,
+ PushPullPullDown = PullDown,
+ OpenDrain = OpenDrainPullUp,
+ PullDefault = PullNone
+} PinMode;
+
+#define STDIO_UART_TX USBTX
+#define STDIO_UART_RX USBRX
+#define STDIO_UART uart0
+
+// Default peripherals
+#define MBED_SPI0 p5, p6, p7, p8
+#define MBED_SPI1 p11, p12, p13, p14
+
+#define MBED_UART0 p9, p10
+#define MBED_UART1 p13, p14
+#define MBED_UART2 p28, p27
+#define MBED_UARTUSB USBTX, USBRX
+
+#define MBED_I2C0 p28, p27
+#define MBED_I2C1 p9, p10
+
+#define MBED_ANALOGIN0 p15
+#define MBED_ANALOGIN1 p16
+#define MBED_ANALOGIN2 p17
+#define MBED_ANALOGIN3 p18
+
+#define MBED_PWMOUT0 p26
+#define MBED_PWMOUT1 p25
+#define MBED_PWMOUT2 p24
+#define MBED_PWMOUT3 p23
+#define MBED_PWMOUT4 p22
+#define MBED_PWMOUT5 p21
+
+#endif
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/PortNames.h b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/PortNames.h
new file mode 100644
index 0000000000..e657d7c65e
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/PortNames.h
@@ -0,0 +1,31 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PORTNAMES_H
+#define MBED_PORTNAMES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+ Port0 = 0,
+} PortName;
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/PinNames.h b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/PinNames.h
new file mode 100644
index 0000000000..1590820a31
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/PinNames.h
@@ -0,0 +1,64 @@
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "PeripheralNames.h"
+#include "boards/pico.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+ p0 = 0,
+ p1 = 1,
+ p2 = 2,
+ p3 = 3,
+ p4 = 4,
+ p5 = 5,
+ p6 = 6,
+ p7 = 7,
+ p8 = 8,
+ p9 = 9,
+ p10 = 10,
+ p11 = 11,
+ p12 = 12,
+ p13 = 13,
+ p14 = 14,
+ p15 = 15,
+ p16 = 16,
+ p17 = 17,
+ p18 = 18,
+ p19 = 19,
+ p20 = 20,
+ p21 = 21,
+ p22 = 22,
+ p23 = 23,
+ p24 = 24,
+ p25 = 25,
+
+ // ADC internal channels
+ ADC_TEMP = 0xF0,
+ ADC_VREF = 0xF1,
+
+ A0 = 26,
+ A1 = 27,
+ A2 = 28,
+ A3 = 29,
+
+ USBTX = p0,
+ USBRX = p1,
+
+ LED1 = p25,
+ LED2 = p25,
+ LED3 = p25,
+ LED4 = p25,
+
+ // Not connected
+ NC = (int)0xFFFFFFFF
+} PinName;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/board.c b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/board.c
new file mode 100644
index 0000000000..1f775638f9
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/board.c
@@ -0,0 +1,3 @@
+#include "PinNames.h"
+
+uint32_t SystemCoreClock = 120000000;
\ No newline at end of file
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/bs2_default_padded_checksummed.S b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/bs2_default_padded_checksummed.S
new file mode 100644
index 0000000000..e9be188191
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TARGET_NANO_RP2040_CONNECT/bs2_default_padded_checksummed.S
@@ -0,0 +1,23 @@
+// Padded and checksummed version of: /ssd/rp2040/pico-examples/build/pico-sdk/src/rp2_common/boot_stage2/bs2_default.bin
+
+.cpu cortex-m0plus
+.thumb
+
+.section .boot2, "ax"
+
+.byte 0x00, 0xb5, 0x31, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x98, 0x68, 0x02, 0x21, 0x88, 0x43, 0x98, 0x60
+.byte 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x2d, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x02, 0x21, 0x59, 0x61
+.byte 0x01, 0x21, 0xf0, 0x22, 0x99, 0x50, 0x2a, 0x49, 0x19, 0x60, 0x01, 0x21, 0x99, 0x60, 0x35, 0x20
+.byte 0x00, 0xf0, 0x42, 0xf8, 0x02, 0x22, 0x90, 0x42, 0x12, 0xd0, 0x06, 0x21, 0x19, 0x66, 0x00, 0xf0
+.byte 0x32, 0xf8, 0x19, 0x6e, 0x31, 0x21, 0x19, 0x66, 0x1a, 0x66, 0x00, 0xf0, 0x2c, 0xf8, 0x19, 0x6e
+.byte 0x19, 0x6e, 0x19, 0x6e, 0x05, 0x20, 0x00, 0xf0, 0x2f, 0xf8, 0x01, 0x21, 0x08, 0x42, 0xf9, 0xd1
+.byte 0x00, 0x21, 0x99, 0x60, 0x1b, 0x49, 0x19, 0x60, 0x00, 0x21, 0x59, 0x60, 0x1a, 0x49, 0x1b, 0x48
+.byte 0x01, 0x60, 0x01, 0x21, 0x99, 0x60, 0xeb, 0x21, 0x19, 0x66, 0x20, 0x21, 0x19, 0x66, 0x00, 0xf0
+.byte 0x12, 0xf8, 0x00, 0x21, 0x99, 0x60, 0x16, 0x49, 0x14, 0x48, 0x01, 0x60, 0x01, 0x21, 0x99, 0x60
+.byte 0x01, 0xbc, 0x00, 0x28, 0x00, 0xd0, 0x00, 0x47, 0x12, 0x48, 0x13, 0x49, 0x08, 0x60, 0x03, 0xc8
+.byte 0x80, 0xf3, 0x08, 0x88, 0x08, 0x47, 0x03, 0xb5, 0x99, 0x6a, 0x04, 0x20, 0x01, 0x42, 0xfb, 0xd0
+.byte 0x01, 0x20, 0x01, 0x42, 0xf8, 0xd1, 0x03, 0xbd, 0x02, 0xb5, 0x18, 0x66, 0x18, 0x66, 0xff, 0xf7
+.byte 0xf2, 0xff, 0x18, 0x6e, 0x18, 0x6e, 0x02, 0xbd, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x18
+.byte 0x00, 0x00, 0x07, 0x00, 0x00, 0x03, 0x5f, 0x00, 0x21, 0x22, 0x00, 0x00, 0xf4, 0x00, 0x00, 0x18
+.byte 0x22, 0x20, 0x00, 0x20, 0x00, 0x01, 0x00, 0x10, 0x08, 0xed, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00
+.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb3, 0x64, 0x01, 0x1a
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TOOLCHAIN_GCC_ARM/memmap_default.ld b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TOOLCHAIN_GCC_ARM/memmap_default.ld
new file mode 100644
index 0000000000..07d5812db1
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/TOOLCHAIN_GCC_ARM/memmap_default.ld
@@ -0,0 +1,252 @@
+/* Based on GCC ARM embedded samples.
+ Defines the following symbols for use by code:
+ __exidx_start
+ __exidx_end
+ __etext
+ __data_start__
+ __preinit_array_start
+ __preinit_array_end
+ __init_array_start
+ __init_array_end
+ __fini_array_start
+ __fini_array_end
+ __data_end__
+ __bss_start__
+ __bss_end__
+ __end__
+ end
+ __HeapLimit
+ __StackLimit
+ __StackTop
+ __stack (== StackTop)
+*/
+
+MEMORY
+{
+ FLASH(rx) : ORIGIN = 0x10000000, LENGTH = 2048k
+ RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 256k
+ SCRATCH_X(rwx) : ORIGIN = 0x20040000, LENGTH = 4k
+ SCRATCH_Y(rwx) : ORIGIN = 0x20041000, LENGTH = 4k
+}
+
+ENTRY(_entry_point)
+
+SECTIONS
+{
+ /* Second stage bootloader is prepended to the image. It must be 256 bytes big
+ and checksummed. It is usually built by the boot_stage2 target
+ in the Raspberry Pi Pico SDK
+ */
+
+ .flash_begin : {
+ __flash_binary_start = .;
+ } > FLASH
+
+ .boot2 : {
+ __boot2_start__ = .;
+ KEEP (*(.boot2))
+ __boot2_end__ = .;
+ } > FLASH
+
+ ASSERT(__boot2_end__ - __boot2_start__ == 256,
+ "ERROR: Pico second stage bootloader must be 256 bytes in size")
+
+ /* The second stage will always enter the image at the start of .text.
+ The debugger will use the ELF entry point, which is the _entry_point
+ symbol if present, otherwise defaults to start of .text.
+ This can be used to transfer control back to the bootrom on debugger
+ launches only, to perform proper flash setup.
+ */
+
+ .text : {
+ __logical_binary_start = .;
+ KEEP (*(.vectors))
+ KEEP (*(.binary_info_header))
+ __binary_info_header_end = .;
+ KEEP (*(.reset))
+ /* TODO revisit this now memset/memcpy/float in ROM */
+ /* bit of a hack right now to exclude all floating point and time critical (e.g. memset, memcpy) code from
+ * FLASH ... we will include any thing excluded here in .data below by default */
+ *(.init)
+ *(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .text*)
+ *(.fini)
+ /* Pull all c'tors into .text */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+ /* Followed by destructors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.eh_frame*)
+ . = ALIGN(4);
+ } > FLASH
+
+ .rodata : {
+ *(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .rodata*)
+ . = ALIGN(4);
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.flashdata*)))
+ . = ALIGN(4);
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ /* Machine inspectable binary information */
+ . = ALIGN(4);
+ __binary_info_start = .;
+ .binary_info :
+ {
+ KEEP(*(.binary_info.keep.*))
+ *(.binary_info.*)
+ } > FLASH
+ __binary_info_end = .;
+ . = ALIGN(4);
+
+ /* End of .text-like segments */
+ __etext = .;
+
+ .ram_vector_table (COPY): {
+ *(.ram_vector_table)
+ } > RAM
+
+ .data : {
+ __data_start__ = .;
+ *(vtable)
+
+ *(.time_critical*)
+
+ /* remaining .text and .rodata; i.e. stuff we exclude above because we want it in RAM */
+ *(.text*)
+ . = ALIGN(4);
+ *(.rodata*)
+ . = ALIGN(4);
+
+ *(.data*)
+
+ . = ALIGN(4);
+ *(.after_data.*)
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__mutex_array_start = .);
+ KEEP(*(SORT(.mutex_array.*)))
+ KEEP(*(.mutex_array))
+ PROVIDE_HIDDEN (__mutex_array_end = .);
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(SORT(.preinit_array.*)))
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ *(SORT(.fini_array.*))
+ *(.fini_array)
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ *(.jcr)
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+ } > RAM AT> FLASH
+
+ .uninitialized_data (COPY): {
+ . = ALIGN(4);
+ *(.uninitialized_data*)
+ } > RAM
+
+ /* Start and end symbols must be word-aligned */
+ .scratch_x : {
+ __scratch_x_start__ = .;
+ *(.scratch_x.*)
+ . = ALIGN(4);
+ __scratch_x_end__ = .;
+ } > SCRATCH_X AT > FLASH
+ __scratch_x_source__ = LOADADDR(.scratch_x);
+
+ .scratch_y : {
+ __scratch_y_start__ = .;
+ *(.scratch_y.*)
+ . = ALIGN(4);
+ __scratch_y_end__ = .;
+ } > SCRATCH_Y AT > FLASH
+ __scratch_y_source__ = LOADADDR(.scratch_y);
+
+ .bss : {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __end__ = .;
+ end = __end__;
+ *(.heap*)
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack*_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later
+ *
+ * stack1 section may be empty/missing if platform_launch_core1 is not used */
+
+ /* by default we put core 0 stack at the end of scratch Y, so that if core 1
+ * stack is not used then all of SCRATCH_X is free.
+ */
+ .stack1_dummy (COPY):
+ {
+ *(.stack1*)
+ } > SCRATCH_X
+ .stack_dummy (COPY):
+ {
+ *(.stack*)
+ } > SCRATCH_Y
+
+ .flash_end : {
+ __flash_binary_end = .;
+ } > FLASH
+
+ /* stack limit is poorly named, but historically is maximum heap ptr */
+ __StackLimit = ORIGIN(RAM) + LENGTH(RAM);
+ __StackOneTop = ORIGIN(SCRATCH_X) + LENGTH(SCRATCH_X);
+ __StackTop = ORIGIN(SCRATCH_Y) + LENGTH(SCRATCH_Y);
+ __StackOneBottom = __StackOneTop - SIZEOF(.stack1_dummy);
+ __StackBottom = __StackTop - SIZEOF(.stack_dummy);
+ PROVIDE(__stack = __StackTop);
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed")
+
+ ASSERT( __binary_info_header_end - __logical_binary_start <= 256, "Binary info must be in first 256 bytes of the binary")
+ /* todo assert on extra code */
+}
+
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/cmsis.h b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/cmsis.h
new file mode 100644
index 0000000000..0920ce2359
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/cmsis.h
@@ -0,0 +1,60 @@
+#ifndef __RP2040_H__
+#define __RP2040_H__
+
+typedef enum IRQn
+{
+ /* ToDo: use this Cortex interrupt numbers if your device is a CORTEX-M0 device */
+ NonMaskableInt_IRQn = -14, /*!< 2 Cortex-M0 Non Maskable Interrupt */
+ HardFault_IRQn = -13, /*!< 3 Cortex-M0 Hard Fault Interrupt */
+ SVCall_IRQn = -5, /*!< 11 Cortex-M0 SV Call Interrupt */
+ PendSV_IRQn = -2, /*!< 14 Cortex-M0 Pend SV Interrupt */
+ SysTick_IRQn = -1, /*!< 15 Cortex-M0 System Tick Interrupt */
+
+ /* ---------------------- RP2040 Specific Interrupt Numbers ------------------ */
+ TIMER_IRQ_0n = 0, /*!< */
+ TIMER_IRQ_1n = 1, /*!< */
+ TIMER_IRQ_2n = 2, /*!< */
+ TIMER_IRQ_3n = 3, /*!< */
+ PWM_IRQ_WRAPn = 4, /*!< */
+ USBCTRL_IRQn = 5, /*!< */
+ XIP_IRQn = 6, /*!< */
+ PIO0_IRQ_0n = 7, /*!< */
+ PIO0_IRQ_1n = 8, /*!< */
+ PIO1_IRQ_0n = 9, /*!< */
+ PIO1_IRQ_1n = 10, /*!< */
+ DMA_IRQ_0n = 11, /*!< */
+ DMA_IRQ_1n = 12, /*!< */
+ IO_IRQ_BANK0n = 13, /*!< */
+ IO_IRQ_QSPIn = 14, /*!< */
+ SIO_IRQ_PROC0n = 15, /*!< */
+ SIO_IRQ_PROC1n = 16, /*!< */
+ CLOCKS_IRQn = 17, /*!< */
+ SPI0_IRQn = 18, /*!< */
+ SPI1_IRQn = 19, /*!< */
+ UART0_IRQn = 20, /*!< */
+ UART1_IRQn = 21, /*!< */
+ ADC_IRQ_FIFOn = 22, /*!< */
+ I2C0_IRQn = 23, /*!< */
+ I2C1_IRQn = 24, /*!< */
+ RTC_IRQn = 25, /*!< */
+} IRQn_Type;
+
+/*
+ * ==========================================================================
+ * ----------- Processor and Core Peripheral Section ------------------------
+ * ==========================================================================
+ */
+
+/* Configuration of the Cortex-M0+ Processor and Core Peripherals */
+#define __CM0PLUS_REV 0x0000 /* Core revision r0p0 */
+#define __MPU_PRESENT 0 /* MPU present or not */
+#define __VTOR_PRESENT 1 /* VTOR present or not */
+#define __NVIC_PRIO_BITS 2 /* Number of Bits used for Priority Levels */
+#define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */
+
+#include "core_cm0plus.h"
+#include "cmsis_nvic.h"
+
+extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock)
+
+#endif
\ No newline at end of file
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/cmsis_nvic.h b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/cmsis_nvic.h
new file mode 100644
index 0000000000..fc07aa7f00
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/cmsis_nvic.h
@@ -0,0 +1,36 @@
+/* mbed Microcontroller Library
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#ifndef MBED_CMSIS_NVIC_H
+#define MBED_CMSIS_NVIC_H
+
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x10000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x0 // 0 B
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x0 // 0 B
+#endif
+
+#endif
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/device.h b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/device.h
new file mode 100644
index 0000000000..8c01d7bae1
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/device.h
@@ -0,0 +1,37 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * SPDX-License-Identifier: Apache-2.0
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+
+#ifndef MBED_DEVICE_H
+#define MBED_DEVICE_H
+
+#include "objects.h"
+
+#endif
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/gpio_api.c b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/gpio_api.c
new file mode 100644
index 0000000000..bdc1ab925d
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/gpio_api.c
@@ -0,0 +1,37 @@
+#include "mbed_assert.h"
+#include "gpio_api.h"
+#include "pinmap.h"
+#include "mbed_error.h"
+
+void gpio_write(gpio_t *obj, int value)
+{
+ gpio_put(obj->pin, value);
+}
+
+int gpio_read(gpio_t *obj)
+{
+ return gpio_get(obj->pin);
+}
+
+void gpio_init(gpio_t *obj, PinName pin)
+{
+ obj->pin = pin;
+ _gpio_init(obj->pin);
+}
+
+void gpio_mode(gpio_t *obj, PinMode mode)
+{
+ gpio_set_pulls(obj->pin, mode == PullUp, mode == PullDown);
+}
+
+void gpio_dir(gpio_t *obj, PinDirection direction)
+{
+ obj->direction = direction;
+ if (direction == PIN_OUTPUT) {
+ gpio_set_dir(obj->pin, GPIO_OUT);
+ }
+ if (direction == PIN_INPUT) {
+ gpio_set_dir(obj->pin, GPIO_IN);
+ }
+}
+
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/mbed_overrides.c b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/mbed_overrides.c
new file mode 100644
index 0000000000..323d734cd5
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/mbed_overrides.c
@@ -0,0 +1,11 @@
+#include "cmsis.h"
+#include "objects.h"
+#include "platform/mbed_error.h"
+
+int mbed_sdk_inited = 0;
+
+void mbed_sdk_init()
+{
+ runtime_init();
+ mbed_sdk_inited = 1;
+}
\ No newline at end of file
diff --git a/targets/TARGET_RASPBERRYPI/TARGET_RP2040/objects.h b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/objects.h
new file mode 100644
index 0000000000..ad3cca07b0
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/TARGET_RP2040/objects.h
@@ -0,0 +1,111 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_OBJECTS_H
+#define MBED_OBJECTS_H
+
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wtype-limits"
+#pragma GCC diagnostic ignored "-Wignored-qualifiers"
+
+#ifdef __cplusplus
+#include <stdint.h>
+#include <cstddef>
+extern "C" {
+#endif
+#include "pico.h"
+#include "pico/platform.h"
+#include "pico/types.h"
+#include "pico/assert.h"
+#include "pico/time.h"
+#include "pico/types.h"
+#include "hardware/pwm.h"
+#include "hardware/adc.h"
+#include "hardware/resets.h"
+#include "hardware/timer.h"
+#include "hardware/uart.h"
+#include "hardware/spi.h"
+#include "hardware/i2c.h"
+#include "hardware/gpio.h"
+#include "hardware/regs/addressmap.h"
+#ifdef __cplusplus
+}
+#endif
+
+#pragma GCC diagnostic pop
+
+#include "cmsis.h"
+
+#include "PortNames.h"
+#include "PeripheralNames.h"
+#include "PinNames.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct gpio_s gpio_t;
+
+struct gpio_s {
+ PinName pin;
+ PinDirection direction;
+};
+
+struct gpio_irq_s {
+ IRQn_Type irq_n;
+ uint32_t irq_index;
+ uint32_t event;
+ PinName pin;
+};
+
+struct port_s {
+ PortName port;
+ uint32_t mask;
+ PinDirection direction;
+ __IO uint32_t *reg_in;
+ __IO uint32_t *reg_out;
+};
+
+/* common objects */
+struct analogin_s {
+ ADCName adc;
+ PinName pin;
+ uint8_t channel;
+};
+
+struct serial_s {
+ uart_inst_t * const uart;
+ int index;
+};
+
+struct i2c_s {
+ i2c_inst_t * const *i2c;
+};
+
+struct spi_s {
+ spi_inst_t * const *spi;
+};
+
+struct flash_s {
+ /* nothing to be stored for now */
+ uint32_t dummy;
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/targets/TARGET_RASPBERRYPI/mbed_rtx.h b/targets/TARGET_RASPBERRYPI/mbed_rtx.h
new file mode 100644
index 0000000000..f43fa2e32d
--- /dev/null
+++ b/targets/TARGET_RASPBERRYPI/mbed_rtx.h
@@ -0,0 +1,27 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2016 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_MBED_RTX_H
+#define MBED_MBED_RTX_H
+
+#if defined(TARGET_RPI2040)
+
+/* TODO */
+
+#endif
+
+#endif // MBED_MBED_RTX_H
diff --git a/targets/targets.json b/targets/targets.json
index c035a6ed52..239260df44 100644
--- a/targets/targets.json
+++ b/targets/targets.json
@@ -9404,6 +9404,35 @@
"inherits": ["AMA3B1KK"],
"components_add": ["lis2dh12", "hm01b0"]
},
+ "RP2040": {
+ "inherits": ["Target"],
+ "core": "Cortex-M0+",
+ "supported_toolchains": ["GCC_ARM"],
+ "extra_labels": [
+ "RASPBERRYPI",
+ "memmap_default"
+ ],
+ "release_versions": [
+ "5"
+ ],
+ "overrides": {
+ "xip-enable": true
+ },
+ "device_has": [
+ "ANALOGIN",
+ "PORT_IN",
+ "PORT_OUT"
+ ]
+ },
+ "NANO_RP2040_CONNECT": {
+ "inherits": ["RP2040"],
+ "macros_add": [
+ "PICO_NO_BINARY_INFO=1",
+ "MBED_MPU_CUSTOM",
+ "PICO_TIME_DEFAULT_ALARM_POOL_DISABLED",
+ "PICO_ON_DEVICE=1"
+ ]
+ },
"__build_tools_metadata__": {
"version": "1",
"public": false
--
2.39.1
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