26 lines
1.3 KiB
Diff
26 lines
1.3 KiB
Diff
From 9c35b625f17ea84d7e65c2287ae554ea68c79229 Mon Sep 17 00:00:00 2001
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From: giulcioffi <g.cioffi@arduino.cc>
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Date: Mon, 8 Nov 2021 12:58:01 +0100
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Subject: [PATCH 188/204] Opta: enable power save mode on SDIO CLK pin
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---
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.../TARGET_OPTA/COMPONENT_WHD/port/cyhal_sdio.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_OPTA/COMPONENT_WHD/port/cyhal_sdio.c b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_OPTA/COMPONENT_WHD/port/cyhal_sdio.c
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index 34aa5498e1..2174d7f58f 100644
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--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_OPTA/COMPONENT_WHD/port/cyhal_sdio.c
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+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_OPTA/COMPONENT_WHD/port/cyhal_sdio.c
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@@ -92,7 +92,7 @@ static cy_rslt_t sdio_enable_high_speed(void)
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sdio_init_structure.ClockDiv = SDMMC_HSpeed_CLK_DIV;
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sdio_init_structure.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
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- sdio_init_structure.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
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+ sdio_init_structure.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_ENABLE;
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sdio_init_structure.BusWide = SDMMC_BUS_WIDE_4B;
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sdio_init_structure.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_ENABLE;
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--
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2.39.1
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