This commit is contained in:
Martijn Scheepers
2026-03-06 10:05:22 +01:00
parent 5c7d2f8579
commit f157081190
3 changed files with 172 additions and 137 deletions

View File

@@ -34,21 +34,13 @@ uint16_t adc_read(analogin_t *obj);
uint16_t analogin_read_u16(analogin_t *obj)
{
uint16_t value = adc_read(obj);
// #ifndef TARGET_STM32H7
// // 12-bit to 16-bit conversion
// value = ((value << 4) & (uint16_t)0xFFF0) | ((value >> 8) & (uint16_t)0x000F);
// #endif
return value;
}
float analogin_read(analogin_t *obj)
{
uint16_t value = adc_read(obj);
//#ifdef TARGET_STM32H7
return (float)value * (1.0f / (float)0xFFFF); // 16 bits range
// #else
// return (float)value * (1.0f / (float)0xFFF); // 12 bits range
// #endif
}
#endif

View File

@@ -37,19 +37,18 @@ extern GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx);
#if defined(DUAL_PAD) // STM32H7
typedef struct {
PinName pin;
uint32_t LL_AnalogSwitch;
typedef struct
{
PinName pin;
uint32_t LL_AnalogSwitch;
} PinAnalogSwitch;
const PinAnalogSwitch PinMapAnalogSwitch[] = {
{PA_0, LL_SYSCFG_ANALOG_SWITCH_PA0},
{PA_1, LL_SYSCFG_ANALOG_SWITCH_PA1},
{PC_2, LL_SYSCFG_ANALOG_SWITCH_PC2},
{PC_3, LL_SYSCFG_ANALOG_SWITCH_PC3},
{NC, 0}
};
{PA_0, LL_SYSCFG_ANALOG_SWITCH_PA0},
{PA_1, LL_SYSCFG_ANALOG_SWITCH_PA1},
{PC_2, LL_SYSCFG_ANALOG_SWITCH_PC2},
{PC_3, LL_SYSCFG_ANALOG_SWITCH_PC3},
{NC, 0}};
/**
* Configure Analog dualpad switch if necessary
@@ -57,28 +56,31 @@ const PinAnalogSwitch PinMapAnalogSwitch[] = {
*/
static void configure_dualpad_switch(PinName pin, int function, uint32_t LL_AnalogSwitch)
{
if (LL_AnalogSwitch == 0) {
return ;
}
if (LL_AnalogSwitch == 0)
{
return;
}
if (((function & STM_MODE_ANALOG) != STM_MODE_ANALOG)
&& ((pin & DUAL_PAD) == DUAL_PAD)) {
/**
* We don't configure an analog function but the pin is an analog pad
* Pxy_C. In this cases Analog switch should be closed
*/
LL_SYSCFG_CloseAnalogSwitch(LL_AnalogSwitch);
return ;
} else {
/**
* Either we configure an analog function,
* or it is not an analog function but it is not an analog pad Pxy_C.
* In both cases Analog switch should be opened
* Note: direct ADC is restricted to Pxy_C, pin only
*/
LL_SYSCFG_OpenAnalogSwitch(LL_AnalogSwitch);
return ;
}
if (((function & STM_MODE_ANALOG) != STM_MODE_ANALOG) && ((pin & DUAL_PAD) == DUAL_PAD))
{
/**
* We don't configure an analog function but the pin is an analog pad
* Pxy_C. In this cases Analog switch should be closed
*/
LL_SYSCFG_CloseAnalogSwitch(LL_AnalogSwitch);
return;
}
else
{
/**
* Either we configure an analog function,
* or it is not an analog function but it is not an analog pad Pxy_C.
* In both cases Analog switch should be opened
* Note: direct ADC is restricted to Pxy_C, pin only
*/
LL_SYSCFG_OpenAnalogSwitch(LL_AnalogSwitch);
return;
}
}
/**
@@ -89,28 +91,32 @@ static void configure_dualpad_switch(PinName pin, int function, uint32_t LL_Anal
*/
static bool is_dualpad_switch_gpio_configurable(PinName pin, int function, uint32_t *pLL_AnalogSwitch)
{
PinAnalogSwitch *AnalogSwitch = (PinAnalogSwitch *) PinMapAnalogSwitch;
PinAnalogSwitch *AnalogSwitch = (PinAnalogSwitch *)PinMapAnalogSwitch;
/* Read through PinMapAnalogSwitch array */
while (AnalogSwitch->pin != NC) {
/* Check whether pin is or is associated to dualpad Analog Input */
if ((AnalogSwitch->pin | DUAL_PAD) == (pin | DUAL_PAD)) {
*pLL_AnalogSwitch = AnalogSwitch->LL_AnalogSwitch;
if (((function & STM_MODE_ANALOG) == STM_MODE_ANALOG)
&& ((pin & DUAL_PAD) == DUAL_PAD)) {
/**
* We configure an analog function and the pin is an analog pad Pxy_C
* In this case gpio configuration must be skipped
*/
return false;
} else {
return true;
}
/* Read through PinMapAnalogSwitch array */
while (AnalogSwitch->pin != NC)
{
/* Check whether pin is or is associated to dualpad Analog Input */
if ((AnalogSwitch->pin | DUAL_PAD) == (pin | DUAL_PAD))
{
*pLL_AnalogSwitch = AnalogSwitch->LL_AnalogSwitch;
if (((function & STM_MODE_ANALOG) == STM_MODE_ANALOG) && ((pin & DUAL_PAD) == DUAL_PAD))
{
/**
* We configure an analog function and the pin is an analog pad Pxy_C
* In this case gpio configuration must be skipped
*/
return false;
}
else
{
return true;
}
}
AnalogSwitch++;
}
AnalogSwitch ++;
}
*pLL_AnalogSwitch = 0;
return true;
*pLL_AnalogSwitch = 0;
return true;
}
#endif /* DUAL_PAD */
@@ -130,33 +136,34 @@ const uint32_t ll_pin_defines[16] = {
LL_GPIO_PIN_12,
LL_GPIO_PIN_13,
LL_GPIO_PIN_14,
LL_GPIO_PIN_15
};
LL_GPIO_PIN_15};
/**
* Configure pin (mode, speed, output type and pull-up/pull-down)
*/
void pin_function(PinName pin, int data)
{
if (pin == NC) {
if (pin == NC)
{
return;
}
// Get the pin informations
uint32_t mode = STM_PIN_FUNCTION(data);
uint32_t mode = STM_PIN_FUNCTION(data);
uint32_t afnum = STM_PIN_AFNUM(data);
uint32_t speed = STM_PIN_SPEED(data);
uint32_t port = STM_PORT(pin);
uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
uint32_t ll_mode = 0;
#if defined(DUAL_PAD)
uint32_t LL_AnalogSwitch = 0;
if (!is_dualpad_switch_gpio_configurable(pin, data, &LL_AnalogSwitch)) {
/* Skip gpio configuration */
configure_dualpad_switch(pin, data, LL_AnalogSwitch);
return;
}
uint32_t LL_AnalogSwitch = 0;
if (!is_dualpad_switch_gpio_configurable(pin, data, &LL_AnalogSwitch))
{
/* Skip gpio configuration */
configure_dualpad_switch(pin, data, LL_AnalogSwitch);
return;
}
#endif /* DUAL_PAD */
// Enable GPIO clock
@@ -168,48 +175,52 @@ void pin_function(PinName pin, int data)
* But for families like F1, speed only applies to output.
*/
#if defined(DUAL_CORE) && (TARGET_STM32H7)
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
}
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID))
{
}
#endif /* DUAL_CORE */
switch (speed) {
/* Default value for backward compatibility */
case STM_PIN_SPEED_MASK:
#if defined (LL_GPIO_SPEED_FREQ_VERY_HIGH)
LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_VERY_HIGH);
switch (speed)
{
/* Default value for backward compatibility */
case STM_PIN_SPEED_MASK:
#if defined(LL_GPIO_SPEED_FREQ_VERY_HIGH)
LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_VERY_HIGH);
#else
LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
#endif
break;
default:
LL_GPIO_SetPinSpeed(gpio, ll_pin, speed);
break;
}
break;
default:
LL_GPIO_SetPinSpeed(gpio, ll_pin, speed);
break;
}
#if defined(DUAL_CORE) && (TARGET_STM32H7)
LL_HSEM_ReleaseLock(HSEM, CFG_HW_GPIO_SEMID, HSEM_CR_COREID_CURRENT);
LL_HSEM_ReleaseLock(HSEM, CFG_HW_GPIO_SEMID, HSEM_CR_COREID_CURRENT);
#endif /* DUAL_CORE */
switch (mode) {
case STM_PIN_INPUT:
ll_mode = LL_GPIO_MODE_INPUT;
break;
case STM_PIN_OUTPUT:
ll_mode = LL_GPIO_MODE_OUTPUT;
break;
case STM_PIN_ALTERNATE:
ll_mode = LL_GPIO_MODE_ALTERNATE;
// In case of ALT function, also set he afnum
stm_pin_SetAFPin(gpio, pin, afnum);
break;
case STM_PIN_ANALOG:
ll_mode = LL_GPIO_MODE_ANALOG;
break;
default:
MBED_ASSERT(0);
break;
switch (mode)
{
case STM_PIN_INPUT:
ll_mode = LL_GPIO_MODE_INPUT;
break;
case STM_PIN_OUTPUT:
ll_mode = LL_GPIO_MODE_OUTPUT;
break;
case STM_PIN_ALTERNATE:
ll_mode = LL_GPIO_MODE_ALTERNATE;
// In case of ALT function, also set he afnum
stm_pin_SetAFPin(gpio, pin, afnum);
break;
case STM_PIN_ANALOG:
ll_mode = LL_GPIO_MODE_ANALOG;
break;
default:
MBED_ASSERT(0);
break;
}
#if defined(DUAL_CORE) && (TARGET_STM32H7)
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID))
{
}
#endif /* DUAL_CORE */
@@ -217,18 +228,25 @@ void pin_function(PinName pin, int data)
#if defined(GPIO_ASCR_ASC0)
/* For families where Analog Control ASC0 register is present */
if (STM_PIN_ANALOG_CONTROL(data)) {
if (STM_PIN_ANALOG_CONTROL(data))
{
LL_GPIO_EnablePinAnalogControl(gpio, ll_pin);
} else {
}
else
{
LL_GPIO_DisablePinAnalogControl(gpio, ll_pin);
}
#endif
/* For now by default use Speed HIGH for output or alt modes */
if ((mode == STM_PIN_OUTPUT) || (mode == STM_PIN_ALTERNATE)) {
if (STM_PIN_OD(data)) {
if ((mode == STM_PIN_OUTPUT) || (mode == STM_PIN_ALTERNATE))
{
if (STM_PIN_OD(data))
{
LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN);
} else {
}
else
{
LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
}
}
@@ -251,35 +269,46 @@ void pin_function(PinName pin, int data)
*/
void pin_mode(PinName pin, PinMode mode)
{
if (pin == NC) {
if (pin == NC)
{
return;
}
uint32_t port_index = STM_PORT(pin);
uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
uint32_t ll_pin = ll_pin_defines[STM_PIN(pin)];
// Enable GPIO clock
GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
#if defined(DUAL_CORE) && (TARGET_STM32H7)
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID)) {
while (LL_HSEM_1StepLock(HSEM, CFG_HW_GPIO_SEMID))
{
}
#endif /* DUAL_CORE */
uint32_t function = LL_GPIO_GetPinMode(gpio, ll_pin);
if ((function == LL_GPIO_MODE_OUTPUT) || (function == LL_GPIO_MODE_ALTERNATE)) {
if ((mode == OpenDrainNoPull) || (mode == OpenDrainPullUp) || (mode == OpenDrainPullDown)) {
if ((function == LL_GPIO_MODE_OUTPUT) || (function == LL_GPIO_MODE_ALTERNATE))
{
if ((mode == OpenDrainNoPull) || (mode == OpenDrainPullUp) || (mode == OpenDrainPullDown))
{
LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN);
} else {
}
else
{
LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
}
}
if ((mode == OpenDrainPullUp) || (mode == PullUp)) {
if ((mode == OpenDrainPullUp) || (mode == PullUp))
{
stm_pin_PullConfig(gpio, ll_pin, GPIO_PULLUP);
} else if ((mode == OpenDrainPullDown) || (mode == PullDown)) {
}
else if ((mode == OpenDrainPullDown) || (mode == PullDown))
{
stm_pin_PullConfig(gpio, ll_pin, GPIO_PULLDOWN);
} else {
}
else
{
stm_pin_PullConfig(gpio, ll_pin, GPIO_NOPULL);
}

View File

@@ -37,10 +37,12 @@ void trng_init(trng_t *obj)
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLL;
#if defined(DUAL_CORE) && (TARGET_STM32H7)
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID)) {
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RCC_SEMID))
{
}
#endif /* DUAL_CORE */
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
error("RNG clock configuration error\n");
}
#if defined(DUAL_CORE) && (TARGET_STM32H7)
@@ -48,7 +50,7 @@ void trng_init(trng_t *obj)
#endif /* DUAL_CORE */
#else
#error("RNG clock not configured");
#error ("RNG clock not configured");
#endif
#endif /* defined(RCC_PERIPHCLK_RNG) */
@@ -66,18 +68,21 @@ void trng_init(trng_t *obj)
#if defined(CFG_HW_RNG_SEMID)
/* In case RNG is a shared ressource, get the HW semaphore first */
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID));
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID))
;
#endif
if (HAL_RNG_Init(&obj->handle) != HAL_OK) {
if (HAL_RNG_Init(&obj->handle) != HAL_OK)
{
error("trng_init: HAL_RNG_Init\n");
}
uint32_t dummy;
/* first random number generated after setting the RNGEN bit should not be used */
/* could be executed few times in case of long init (obj->handle.ErrorCode can be checked for debug) */
while (HAL_RNG_GenerateRandomNumber(&obj->handle, &dummy) != HAL_OK) {
while (HAL_RNG_GenerateRandomNumber(&obj->handle, &dummy) != HAL_OK)
{
}
#if defined(CFG_HW_RNG_SEMID)
@@ -85,12 +90,12 @@ void trng_init(trng_t *obj)
#endif
}
void trng_free(trng_t *obj)
{
#if defined(CFG_HW_RNG_SEMID)
/* In case RNG is a shared ressource, get the HW semaphore first */
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID));
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID))
;
#endif
/*Disable the RNG peripheral */
HAL_RNG_DeInit(&obj->handle);
@@ -104,7 +109,6 @@ void trng_free(trng_t *obj)
#endif
}
int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_length)
{
int ret = 0;
@@ -113,15 +117,21 @@ int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_l
#if defined(CFG_HW_RNG_SEMID)
/* In case RNG is a shared ressource, get the HW semaphore first */
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID));
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID))
;
#endif
/* Get Random byte */
while ((*output_length < length) && (ret == 0)) {
if (HAL_RNG_GenerateRandomNumber(&obj->handle, (uint32_t *)random) != HAL_OK) {
while ((*output_length < length) && (ret == 0))
{
if (HAL_RNG_GenerateRandomNumber(&obj->handle, (uint32_t *)random) != HAL_OK)
{
ret = -1;
} else {
for (uint8_t i = 0; (i < 4) && (*output_length < length) ; i++) {
}
else
{
for (uint8_t i = 0; (i < 4) && (*output_length < length); i++)
{
*output++ = random[i];
*output_length += 1;
random[i] = 0;
@@ -130,7 +140,8 @@ int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_l
}
/* Just be extra sure that we didn't do it wrong */
if ((__HAL_RNG_GET_FLAG(&obj->handle, (RNG_FLAG_CECS | RNG_FLAG_SECS))) != 0) {
if ((__HAL_RNG_GET_FLAG(&obj->handle, (RNG_FLAG_CECS | RNG_FLAG_SECS))) != 0)
{
ret = -1;
}
@@ -148,16 +159,19 @@ int trng_get_byte32(trng_t *obj, uint32_t *output)
#if defined(CFG_HW_RNG_SEMID)
/* In case RNG is a shared ressource, get the HW semaphore first */
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID));
while (LL_HSEM_1StepLock(HSEM, CFG_HW_RNG_SEMID))
;
#endif
/* Get Random byte */
if (HAL_RNG_GenerateRandomNumber(&obj->handle, output) != HAL_OK) {
if (HAL_RNG_GenerateRandomNumber(&obj->handle, output) != HAL_OK)
{
ret = -1;
}
}
/* Just be extra sure that we didn't do it wrong */
if ((__HAL_RNG_GET_FLAG(&obj->handle, (RNG_FLAG_CECS | RNG_FLAG_SECS))) != 0) {
if ((__HAL_RNG_GET_FLAG(&obj->handle, (RNG_FLAG_CECS | RNG_FLAG_SECS))) != 0)
{
ret = -1;
}