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driver: at91_slowclk: fix sam9x60 oscsel bit

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SAM9X60 has another bit as slow clock selector (OSCSEL).
Fix the defines accordingly.
SAM9X60 does not have a bit to disable the internal RC slow clock (it is
always enabled).
Thus the function for this feature should not be available.

Reported-by: Ilie Galan <ilie.galan@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This commit is contained in:
Eugen Hristev
2019-11-29 15:06:07 +02:00
parent c685e79cf1
commit 888c3a1e8a
2 changed files with 7 additions and 2 deletions
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4
driver/at91_slowclk.c
View File

@@ -62,7 +62,7 @@ static void slowclk_wait_osc32_stable(void)
wait_interval_timer(1300);
}
#if !defined(SAMA5D4) && !defined(SAMA5D2)
#if !defined(SAMA5D4) && !defined(SAMA5D2) && !defined(SAM9X60)
static void slowclk_disable_rc32(void)
{
unsigned int reg;
@@ -108,7 +108,7 @@ int slowclk_switch_osc32(void)
slowclk_select_osc32();
#if !defined(SAMA5D4) && !defined(SAMA5D2)
#if !defined(SAMA5D4) && !defined(SAMA5D2) && !defined(SAM9X60)
slowclk_disable_rc32();
#endif

5
include/arch/at91_slowclk.h
View File

@@ -31,6 +31,11 @@
#define AT91C_SLCKSEL_RCEN (0x1UL << 0)
#define AT91C_SLCKSEL_OSC32EN (0x1UL << 1)
#define AT91C_SLCKSEL_OSC32BYP (0x1UL << 2)
#if defined(SAM9X60)
#define AT91C_SLCKSEL_OSCSEL (0x1UL << 24)
#else
#define AT91C_SLCKSEL_OSCSEL (0x1UL << 3)
#endif
#endif /* #ifndef __AT91_SLOWCLK_H__ */